2-to-4 line decoder

Objective

Decode a two-bit code into one-hot outputs with NOT and AND gates.

Procedure

1. Run and watch one output at a time go high.

Theory

Y0 = A'B', Y1 = A'B, Y2 = AB', Y3 = AB: exactly one output is high for each input code.

Questions to answer

1. How is a 3-to-8 decoder used for memory addressing?

Components used

4 × AND, 4 × Logic probe / LED, 2 × Logic switch, 2 × NOT

About the model

Ideal wires; component models as listed in the catalogue (no parasitics, no temperature drift). Built without a breadboard so the schematic stays readable.

More Digital Systems Lab experiments

• D flip-flop
• JK flip-flop (hold, set, reset, toggle)
• 4-bit binary counter
• Mod-6 counter (asynchronous reset)
• Serial-in parallel-out shift register